Execution performance of NAS NBP 3.3
Results obtained on May, 2017.
The NAS Parallel Benchmarks (NPB) are a well-known suite of performance benchmarks to estimate possibilities of HPC systems. They were developed in NASA Numerical Aerodynamic Simulation Program and supported in NASA Advanced Supercomputing (NAS) Division. The following tests from NAS Parallel Benchmarks had been parallelized using Fortran-DVMH high-level language:
- MG (MultiGrid) – Approximation of the solution for a three-dimensional discrete Poisson equation using the V-cycle multigrid method.
- CG (Conjugate Gradiant) – Approximation to the smallest eigenvalue of a large sparse symmetric positive-definite matrix using the inverse iteration method together with the conjugate gradient method as a subroutine for solving systems of linear equations.
- FT (Fast Fourier Transform) – Solution of three-dimensional partial differential equation (PDE) using the fast Fourier transform (FFT).
- EP (Embarrassingly Parallel) – Generation of independent Gaussian random variates using the Marsaglia polar method.
- BT (Block Tridiagonal), SP (Scalar Pentadiagonal) and LU (Lower-Upper) – Solution of a synthetic system of nonlinear PDEs (three-dimensional system of Navier-Stokes equations for compressible fluid or gas) using three different algorithms: block three-diagonal scheme with the method of alternating directions (BT), the scalar pentadiagonal scheme (SP) and method of symmetric successive over-relaxation (algorithm SSOR of LU).
For each problem there is a set of input data. The set is determined by the class of the test. In total, there are 7 classes: S and W classes determine very small input data and are used primarily for testing and debugging during development; A, B and C classes determine small, medium and large data respectively, that designed to test a single node; D and E classes determine very large and huge data, designed to test several nodes.
There are no data dependencies in the loops of MG, CG, FT and EP tests. But the loops of LU, BT and SP tests have regular data dependencies due to using the method of alternating drections in SP, BT and successive over relaxation method in LU.
Table 1 shows the execution times of implemented tests:
- Serial versions of the original tests executed on a one core of processor Intel Xeon E5 1660 v2.
- Parallel versions of the tests written in Fortran-DVMH language, executed on the following graphics accelerators: NVIDIA Tesla C2070 with enabled ECC (Fermi generation), NVIDIA GTX Titan (Kepler generation), NVIDIA Tesla k40 with ECC disabled (Kepler generation).
- Parallel versions of the tests written in Fortran-DVMH language, executed on 6-cores processor Intel Xeon E5 1660 v2 with active Hyper Threading (2 threads per core) and disabled Turbo Boost and on 60-cores Intel Xeon Phi 5110 with active Hyper Threading (4 threads per core).
Serial versions of the programs were compiled by Intel Fortran Compiler V17.0 with options -O3 -mcmodel=medium -shared-intel. To compile Fortran-DVMH programs following compilers had been used:
- Intel Fortran Compiler V17.0 with options -O3 -no-scalar-rep -qopenmp;
- Intel C/C++ Compiler V17.0 with options -O3 -no-scalar-rep -qopenmp;
- NVidia Compiler V8.0 with options -arch=sm_35 -O3 -DCUDA_NO_SM_20_INTRINSICS.
Table 1. Execution times of NAS tests
|Intel Xeon E5 1660 v2||NVIDIA Tesla C2070|
|NVIDIA GTX Titan|
|NVIDIA Tesla k40|
|Intel Xeon E5 1660 v2||Intel Xeon Phi 5110|
The diagrams demonstrating acceleration of the tests are shown below.
Fig.1. Acceleration of BT, SP, LU tests on classes A, B, C with using GPU of different types and architecture
Fig.2. Acceleration of MG, CG, FT tests on classes A, B, C with using GPU of different types and architecture
Fig.3. Acceleration of BT, SP, LU tests on classes A, B, C with using Intel Xeon E5 1660 v2 и Intel Xeon Phi 5110
Fig.4. Acceleration of MG, CG, FT tests on classes A, B, C with using Intel Xeon E5 1660 v2 and Intel Xeon Phi 5110
Fig. 5 shows the acceleration of EP test on class C compared to a sequential version of the program executed on a single core of Intel Xeon E5 1660 v2. This test was executed on different architectures separately as well as in the following combinations: Intel Xeon E5 1660 v2 + GTX Titan, Intel Xeon E5 1660 v2 + Intel Xeon Phi and Intel Xeon E5 1660 v2 + GTX Titan + Intel Xeon Phi. Purple color show case when load balancing was additionally used by setting the ratio of the weights of all cores of CPU and GPU, and ratio of weights of MPI-processes mapped on the CPU and coprocessor.
Fig.5. Acceleration of EP test on class C
Comparison of FDVMH versions of the tests from NAS NBP 3.3 package with the following versions of the programs was done in May, 2015: